1. Field of the Invention
This invention relates to a sales method for selling partially good semiconductor products by way of a communication network, a sales system for semiconductor devices, a recording medium storing a sales program for semiconductor devices and a rejected semiconductor device adapted to operates as partially good device.
2. Description of the Related Art
General purpose memories are normally designed to comprise a plurality of memory cell arrays in order to reduce the length and hence the capacity of each bit line and/or lower the power consumption rate of the memory. A memory comprising a plurality of memory cell arrays is produced by way of a memory cell array dividing operation. Such an operation is necessary mainly because of restrictions imposed on it such as standard specifications for refreshing and/or the configuration of output bits. Then, the cell arrays are selectively activated according to the externally input addresses.
It is a normal practice for most memory producers to concurrently develop memory products with different memory sizes (e. g., 576M, 512M, 288M, 256M, 144M and 128M). Then, the memory products of different memory sizes are developed by minimally modifying the positions of the address pads for externally input addresses and the control pads for the purpose of raising the efficiency of development. In the course of development, however, some of the memory cells of a memory product can become defective due to one or more than one problems in the manufacturing process. Then, the memory chip cannot be produced with the designed memory size. If the chip meets the two requirements of (1) having parity cells for the ECC (error checking and correcting) feature and (2) some of the defective memory cells of the cell arrays can be replaced by the parity cells, the chip is produced as a product without the ECC function. If the cell arrays of chips are free from problems and the demand for products without the ECC function (e. g., 576M is replaced by 512M, 288M is replaced by 256M and 144M is replaced by 128M), the chips may also be produced as products without the ECC function.
FIG. 1 of the accompanying drawing schematically illustrates the configuration of a known general purpose memory. Referring to FIG. 1, it comprises a plurality of cell arrays that are adapted to be selectively activated according to the externally input addresses. More specifically, the illustrated known memory comprises four cell arrays provided with respective parity cell regions for the ECC function. Of the four cell arrays, two are driven to operate separately by an internal address signal. In other words, they are activated selectively. In FIG. 1, reference symbols MA1 through MA4 denotes first through fourth cell arrays respectively. The cell arrays MA1 through MA4 are driven to operate separately, or selectively activated, by cell array selection signals φ1, φ2. Reference symbols PA1 through PA4 in MA1 through MA4 denote parity cell regions for parity bits. Reference symbol AS denotes an array selection circuit 91, which is adapted to receive external address (A0) and generate cell array selection signals φ1, φ2.
Now, the operation of the general purpose memory will be described below.
As the chip is activated and external address (A0) is input to the array selection circuit 91, the latter generates cell array selection signals φ1, φ2, which are then used to select cell arrays. In the instance of FIG. 1, the circuit is so configured that φ1 comes to level “H” when A0 is at “H” whereas φ2 comes to level “H” when A0 is at “L”. Thus, when A0 is at “H”, φ1 comes to level “H” to selectively activate the cell arrays A1 and A4.
Now, assume that the parity cell region PA4 contains a defective area (Err_PA4) that cannot be relieved by the redundancy feature of the chip. Then, it is no longer possible to develop and market the chip as semiconductor memory device having an ECC function. However, since the defect is found only in the parity cell region, the chip can be developed and marketed as product having no ECC function. More specifically, for instance, a product designed as 288M product may be developed and marketed as 256M product. In other words, the product operates as product having no ECC function without any problem and it is nominally referred to as a product having no ECC function. Therefore, the circuit system is not designed for a total shutdown of the parity bit circuit and a chip information rewriting operation (e.g., information on the presence or absence of an ECC function). Thus, the chip cannot be classified as perfectly good product having no ECC function. A similar discussion may be made when a product having an ECC function is developed marketed as a product having no ECC function because of the demand for products.
In the above discussion, it is assumed that a parity cell region contains a defective area. However, there may be cases where a defect is found outside the parity cell regions or the chip cannot find any particular application. Then, a chip having an ECC function will be developed and marketed as an ECC having no ECC function regardless if its memory cell arrays contain an defect or not in order to improve the yield of manufacturing products having no ECC function and also the efficiency of product development. However, such a technique of excluding the ECC function and reducing the memory size will not remarkably improve the manufacturing yield.
Assume, for example, that a product contains a defective area (Err_MA1) outside the parity cell regions and the cell array (MA1) is completely out of order due to the defect. Then, under the current circumstances, the chip will completely lose its market value although three out of the four cell arrays operate without any problem. Of course, like the earlier discussion, it may not become a perfectly good product if it is made to apparently have no ECC function because the circuit system is not modified.
As discussed above, the integrated circuits comprising a large number of elements and coming out from a manufacturing line may include partially good ones that are not perfectly good but will operate satisfactorily depending on the application regardless if the ICs are memories or logic devices.
For example, a partially good product may be a 256 mega-bit DRAM that has lost the memory capacity of 6 mega-bits but operates well as 250 mega-bits memory. As pointed out above, a partially good product may be not a memory but a logic device that was designed to have a number of functions but has lost some of them, although the remaining features are quite good.
To date, such partially good products are rejected as no good products and disposed as waste. Attempts have been made to sell them as partially good products. However, because of the market practice of selling and buying semiconductor products on a lot basis, there is no knowing who want to buy such imperfect products and all such attempts have failed so far.
As pointed out above, chips containing one or more than one defects can be turned to partially good products by appropriately processing them. However, partially good products are not perfectly good products and, under the current circumstances, there is no knowing who want to buy partially good products. Therefore, to date, such partially good products are simply wasted to make the semiconductor manufacturer partly miss the expected profit.
On the other hand, from the viewpoint of buyers of semiconductor devices, who may be computer manufacturers, memory devices having an unnecessarily large memory capacity simply push up the prices of their products. For instance, assume that a computer system needs to be provided with a memory having a memory capacity of 160 mega bits. Then, a 128 mega-bit memory will not do but the memory capacity of a 256 mega-bit memory is too much. However, no memories with a memory capacity between 128 mega bits and 256 mega bits are commercially available. Thus, the computer manufacturer is formed to mount a 256 mega-bit memory on the computer system, although the memory capacity is too much. Of course, the computer manufacturer may buy a partially good memory product having a memory capacity of 170 or 180 mega bits if such a product is commercially available. However, there is no knowing which semiconductor manufacturer is selling such an imperfect product.